Adjustable frequency divider

1. Introduction

This circuit divides the frequency of a square wave by 10,20,30....,90. Nine switches are provided to set the frequency division factor. S1 is for 10, S2 is for 20, and so on up to S9.

2. Circuit diagram

Adjustable frequency divider

3.Circuit description

1. Square wave signal is generated by a frequency generator and is given to clk pin of  IC4017 which is a decade ring counter. The way a ring counter works is by turning on and off each of the nine pins on the beat of the clk pulse. The output is in sync with clk pulses. 
2. Switches S1 to S9 determine the division factor. If Sx is on then the signal is divided by 1x. S1=1, S2=2,...S9=9. The end node of all the switches is connected to the reset pin through a positive edge detector. The IC will reset i.e start counting from Q0 as it receives a positive pulse.
3. The divided output from Q0 of IC4017 is further used as a clk pulse for another IC4017 which divides the signal by 10. 
4. Thus the final output from Q0 is divide by 1*10=10, 2*10=20,.....9*10=90. 
5. If you are using it as a looped timmer then a microswitch is used to reset the IC to set the starting point for the timmer. 
6. The output is given to a monostable circuit made by 555 timmer IC. Transistor Q2 along with capacitor and resistor form the positive edge detector which is used to trigger the monostable multivibrator. This is how we get a pulse of fix 'on time' given by formula T=1.11RC. 

4. Circuit working demo

Thank you! hope you find this circuit useful.

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